A low-cost built-in self-test for CP-PLL based on TDC

نویسندگان

  • Lanhua Xia
  • Jianhui Wu
  • Zhikuang Cai
  • Meng Zhang
  • Xincun Ji
چکیده

To ensure qualification of charge-pump locked-loop (CPPLL), a complete built-in self-test (BIST) scheme should provide functions of measurement of the clock jitter and detection of faults in CP-PLL. This paper proposes a low cost BIST structure providing both the faults detected and timing jitter measured. The structure based on the proposed time-to-digital converter (TDC), which has high resolution and most blocks of TDC are based on the existing blocks in CPPLL, reduces the test cost and area overhead. The circuit has been designed and simulated in TSMC 0.13 μm CMOS process. The simulation results show that the resolution is about 0.9865 ps and the fault coverage is 98.33%.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Investigations for Minimum Invasion Digital Only Built-In "Ramp" Based Test Techniques for Charge Pump PLL's

Due to a number of desirable operational and design characteristics, CP-PLL’s (Charge Pump Phase locked loops) have, in recent years become a pervasive PLL architecture. CP-PLL architectures are exploited for a variety of applications such as on chip clock generation, CRC (clock recovery circuits) and Radio frequency synthesis applications. This paper describes a simple, digital only, minimally...

متن کامل

A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals

Testing PLLs (phase-locked loops) is becoming an important issue that affects both time-to-market and production cost of electronic systems. Though a PLL is the most common mixed-signal building block, it is very difficult to test due to internal analog blocks and signals. In this paper, we propose a new PLL BIST (built-in self test) using the distorted frequency detector that uses only interna...

متن کامل

A Wideband Frequency Synthesizer for Built-in Self Testing of Analog Integrated Circuits

A Wideband Frequency Synthesizer for Built-in Self Testing of Analog Integrated Circuits. (August 2004) Wenjian Yan, B.S., Texas A&M University Chair of Advisory Committee: Dr. Jose Silva-Martinez The cost to test chips has risen tremendously. Additionally, the process for testing all functionalities of both analog and digital part is far from simple. One attractive option is moving some or all...

متن کامل

Low Power March Memory Test Algorithm for Static Random Access Memories (TECHNICAL NOTE)

Memories are most important building blocks in many digital systems. As the Integrated Circuits requirements are growing, the test circuitry must grow as well. There is a need for more efficient test techniques with low power and high speed. Many Memory Built in Self-Test techniques have been proposed to test memories. Compared with combinational and sequential circuits memory testing utilizes ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:
  • IEICE Electronic Express

دوره 11  شماره 

صفحات  -

تاریخ انتشار 2014